The present disclosure generally relates to thin film devices and method(s) for forming the same.
Thin film devices (TFDs) are often used in, for example, liquid crystal devices (LCDs), light emitting diodes (LEDs) and plasma display panels (PDPs). A thin film device typically includes a first multi-layered stack including planar at least semi-conductive material segments separated by a gap and a second multi-layered stack disposed on the first multi-layered stack. A three-dimensional profile may be created on the second multi-layered stack to form components of the device, such as a drain electrode, a source electrode, a gate, and/or a channel.
The performance of a thin film device, such as a thin film transistor, depends, at least in part, on the ratio of the width of the planar strips to the dimension of the nano-gap formed between two adjacent strips. If anisotropic conductance is maintained, the device should exhibit improved performance with a larger strip width/nano-gap dimension ratio. In applications where an array of high density of strips is desired (such as, for example, a thin film transistor backplane) the dimension of the nano-gaps should be scaled down to achieve a desired performance level of the device. Current nano-imprinting processes, however, may pose challenges in forming suitably “small” nano-gaps to achieve the desired performance level of a thin film device.